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- Figure 1 from Design of a compact reversible binary coded decimal adder circuit | Semantic Scholar
- Figure 1 from Design of a compact reversible binary coded decimal adder circuit | Semantic Scholar
- Table 2 from Design of a compact reversible binary coded decimal adder circuit | Semantic Scholar
- Figure 1 from Design of a compact reversible binary coded decimal adder circuit | Semantic Scholar
- Figure 1 from Design of a compact reversible binary coded decimal adder circuit | Semantic Scholar
- Table 2 from Design of a compact reversible binary coded decimal adder circuit | Semantic Scholar
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