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Issues · alexforencich/verilog-ethernet · GitHub

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Ethernet Mac micro architecture · Issue #165 · alexforencich/verilog-ethernet · GitHub

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TCP Client and server implementation · Issue #122 · alexforencich/verilog-ethernet · GitHub

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Porting verilog-ethernet to KR260 · Issue #146 · alexforencich/verilog-ethernet · GitHub

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Broadcom® B50610 PHY chip support · Issue #65 · alexforencich/verilog-ethernet · GitHub

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