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- Figure 2 from Low-power VLSI decoder architectures for LDPC codes | Semantic Scholar
- Figure 5 from Low-power VLSI decoder architectures for LDPC codes | Semantic Scholar
- Figure 1 from Low-power VLSI decoder architectures for LDPC codes | Semantic Scholar
- Figure 9 from Low-power VLSI decoder architectures for LDPC codes | Semantic Scholar
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- Figure 3 from Low power decoder design for QC-LDPC codes | Semantic Scholar